Photo-sensitive electronic components can be used to create electronic imaging systems, including systems for detecting and measuring motion. When used for motion detection, obtaining a highly detailed image of an area or object may be less important than determining whether a particular image reflects a change by comparison to a prior image. In turn, this may place higher importance upon contrast between neighboring image elements.
One application for motion detection is a computer pointing or input device, such as a computer mouse. Use of electronic imaging for such purposes is described in, e.g., U.S. Pat. Nos. 6,303,924 (titled “Image Sensing Operator Input Device”) and 6,172,354 (titled “Operator Input Device”). As described in those patents, an array of photo-sensitive elements generates an image of a desktop (or other surface) when light from an associated illumination source (such as a light emitting diode) reflects from the desktop or other surface. Subsequent images are compared, and based on the correlation between images, the magnitude and direction of mouse (or other device) motion may be determined.
FIG. 1 shows a pixel within a photo-sensor array architecture used in existing computer input devices. Each pixel of the photo-sensor array includes a photo-sensor 10, which may be a photodiode or other photosensitive component. Prior to obtaining an image, a RESET signal on NMOS transistor 12 allows node INT to be charged to a reference voltage Vref. When the RESET signal is not asserted, light reflected from a desktop or other surface illuminates photo-sensor 10, thereby permitting a reverse bias current to flow to ground through photo-sensor 10. Node INT is then discharged as a result of the reverse bias current through photo-sensor 10. Higher intensity (or brighter) light, which may correspond to a more reflective object or surface feature, allows a greater reverse bias current through photo-sensor 10, and thus a more rapid discharge of node INT. Conversely, lower intensity (or dimmer) light, which may correspond to reflection from a darker object or surface feature, allows a smaller reverse bias current through photo-sensor 10, and a less rapid discharge of node INT. The voltage on node INT controls the gate of NMOS transistor 14; as the charge on node INT is drained, the correspondingly decreasing bias on NMOS 14 causes a drop in the voltage at node 16. At a designated point in time, a SELECT signal is applied on the gate of NMOS 18, permitting a charge to accumulate on storage capacitor 20. The voltage across NMOS 14 varies with the gate voltage on NMOS 14, which in turn varies with intensity of illumination upon photo-sensor 10. Thus, the magnitude of the accumulated voltage on storage capacitor 20 relates to the magnitude of the illumination upon photo-sensor 10. Because the intensity of the reflected illumination will vary based upon surface features of a desk or other surface, this charge on storage capacitor 20 can be used (as part of an array of photo-sensor pixels) to detect and measure changes of position with regard to that desk or other work surface.
The voltage on each capacitor in the array is passed through a multiplexer (MUX) to an Analog to Digital Converter (ADC). The ADC outputs digital values corresponding to the voltages on the storage capacitors, which represent the relative intensity of illumination upon the photo-sensors in the array. These digital values are then passed through a digital DC Removal (DCR) process to enhance the image contrast and to reduce the number of storage elements needed to store the resultant image. A subsequent Correlator compares the DCR processed image data with prior DCR processed image data, and produces navigation data reflecting the magnitude and direction of device motion.
In the example of FIG. 1, a separate storage capacitor is required to store the value for each photo-sensor in the array. Storage capacitors are typically located on each side of the array, and require a relatively large amount of area on an Integrated Circuit (IC). This architecture is also susceptible to parasitic signal couplings, capacitor leakages and charge injections, and can only store an image without corruption for a relatively short time. Moreover, this architecture presents problems with regard to digitally-oriented Application Specific Integrated Circuit (ASIC) technologies, which may involve high sub-threshold leakages and low power supply voltages.
In an architecture such as shown in FIG. 1, the ADC function and subsequent DCR processing is all performed in a bit-wise serial fashion, i.e., one pixel at a time. Because each pixel value from the ADC may be multiple bits in length, significant digital circuitry may be required to DCR process all pixel values. This additional circuitry requires additional IC area, which increases cost. This processing must also occur quickly (on the order of 100 μseconds). For high speed applications (such as detection of movements of a computer mouse), a high speed ADC is required to serially perform the conversion for each pixel, as well as high speed digital circuitry to serially enhance pixel contrast. Significant digital memory may also be required to store multibit data for each pixel. Although it is possible to implement multiple ADCs and other digital circuitry components to parallel process multiple pixels, the multiple components required for parallel processing must have matched properties. Such parallel processing also increases power requirements.
Accordingly, there remains a need for improved electronic image processing systems for motion detection.